CMKDM8005 surface mount dual p-channel enhancement-mode silicon mosfets maximum ratings: (t a =25c) symbol units drain-source voltage v ds 20 v gate-source voltage v gs 8.0 v continuous drain current (steady state) i d 650 ma continuous source current (body diode) i s 250 ma maximum pulsed drain current i dm 1.0 a power dissipation p d 350 mw operating and storage junction temperature t j , t stg -65 to +150 c thermal resistance ja 357 c/w electrical characteristics per transistor: (t a =25c unless otherwise noted) symbol test conditions min typ max units i gssf , i gssr v gs =4.5v, v ds =0 10 a i dss v ds =16v, v gs =0 100 na bv dss v gs =0, i d =250a 20 v v gs(th) v ds =v gs , i d =250a 0.5 1.0 v v sd v gs =0, i s =250ma 1.1 v r ds(on) v gs =4.5v, i d =350ma 0.25 0.36 r ds(on) v gs =2.5v, i d =300ma 0.37 0.5 r ds(on) v gs =1.8v, i d =150ma 0.8 q g(tot) v ds =10v, v gs =4.5v, i d =200ma 1.2 nc q gs v ds =10v, v gs =4.5v, i d =200ma 0.24 nc q gd v ds =10v, v gs =4.5v, i d =200ma 0.36 nc g fs v ds =10v, i d =200ma 0.2 s description: the central semiconductor CMKDM8005 consists of dual p-channel enhancement-mode silicon mosfets designed for high speed pulsed amplifier and driver applications. these mosfets offer very low r ds(on) and low threshold voltage. marking code: c85m features: ? esd protection up to 2kv ? 350mw power dissipation ? very low r ds(on) ? low threshold voltage ? logic level compatible ? small, sot-363 surface mount package applications: ? load switch / level shifting ? battery charging ? boost switch ? electro-luminescent backlighting sot-363 case r2 (27-september 2011) www.centralsemi.com
CMKDM8005 surface mount dual p-channel enhancement-mode silicon mosfets sot-363 case - mechanical outline electrical characteristics per transistor - continued: (t a =25c unless otherwise noted) symbol test conditions typ max units c rss v ds =16v, v gs =0, f=1.0mhz 25 pf c iss v ds =16v, v gs =0, f=1.0mhz 100 pf c oss v ds =16v, v gs =0, f=1.0mhz 21 pf t on v dd =10v, v gs =4.5v, i d =200ma, r g =10 38 ns t off v dd =10v, v gs =4.5v, i d =200ma, r g =10 48 ns pin configuration lead code: 1) source q1 2) gate q1 3) drain q2 4) source q2 5) gate q2 6) drain q1 marking code: c85m www.centralsemi.com r2 (27-september 2011)
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